{"id":19349,"date":"2021-09-23T15:33:12","date_gmt":"2021-09-23T13:33:12","guid":{"rendered":"https:\/\/ritme.com\/le-traitement-heterogene-exige-la-parallelisation-des-donnees-sycl-et-dpc-sont-un-bon-debut\/"},"modified":"2021-09-24T13:00:51","modified_gmt":"2021-09-24T11:00:51","slug":"heterogeneous-processing-requires-data-parallelization-sycl-and-dpc-are-a-good-start","status":"publish","type":"post","link":"https:\/\/ritme.com\/en\/heterogeneous-processing-requires-data-parallelization-sycl-and-dpc-are-a-good-start\/","title":{"rendered":"Heterogeneous Processing Requires Data Parallelization: SYCL and DPC++ Are a Good Start"},"content":{"rendered":"\n<section class=\"wp-block-uagb-columns uagb-columns__wrap uagb-columns__background-undefined uagb-columns__stack-mobile uagb-columns__valign-undefined uagb-columns__gap-10 alignundefined uagb-block-3d8c7d47 text-card custom-shadow valign-center\"><div class=\"uagb-columns__overlay\"><\/div><div class=\"uagb-columns__inner-wrap uagb-columns__columns-2\">\n<div class=\"wp-block-uagb-column uagb-column__wrap uagb-column__background-undefined uagb-block-3d5bf0a1\"><div class=\"uagb-column__overlay\"><\/div><div class=\"uagb-column__inner-wrap\">\n<div class=\"wp-block-getwid-section getwid-margin-bottom-none\" style=\"margin-top:-25px\"><div class=\"wp-block-getwid-section__wrapper getwid-padding-top-none getwid-padding-bottom-none getwid-padding-left-none getwid-padding-right-none\" style=\"min-height:0px\"><div class=\"wp-block-getwid-section__inner-wrapper\"><div class=\"wp-block-getwid-section__background-holder\"><div class=\"wp-block-getwid-section__background\"><\/div><div class=\"wp-block-getwid-section__foreground\"><\/div><\/div><div class=\"wp-block-getwid-section__content\"><div class=\"wp-block-getwid-section__inner-content\">\n<p style=\"font-size:22px\"><strong><span class=\"has-inline-color has-ritme-blue-color\">James Reinders<\/span><\/strong><\/p>\n<\/div><\/div><\/div><\/div><\/div>\n\n\n\n<figure class=\"wp-block-image size-large is-resized is-style-rounded\"><a href=\"https:\/\/www.linkedin.com\/in\/jamesreinders\/?utm_source=thenewstack&amp;utm_medium=website&amp;utm_campaign=platform\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/ritme.com\/wp-content\/uploads\/2021\/09\/James_Reunders.jpeg\" alt=\"\" class=\"wp-image-19270\" width=\"139\" height=\"139\"\/><\/a><\/figure>\n\n\n\n<div class=\"wp-block-getwid-section getwid-margin-top-none getwid-margin-bottom-none\"><div class=\"wp-block-getwid-section__wrapper getwid-padding-bottom-medium getwid-padding-right-none getwid-margin-left-none getwid-margin-right-none\" style=\"padding-left:5px\"><div class=\"wp-block-getwid-section__inner-wrapper\"><div class=\"wp-block-getwid-section__background-holder\"><div class=\"wp-block-getwid-section__background\"><\/div><div class=\"wp-block-getwid-section__foreground\"><\/div><\/div><div class=\"wp-block-getwid-section__content\"><div class=\"wp-block-getwid-section__inner-content\"><\/div><\/div><\/div><\/div><\/div>\n<\/div><\/div>\n\n\n\n<div class=\"wp-block-uagb-column uagb-column__wrap uagb-column__background-undefined uagb-block-7e5e57c2\"><div class=\"uagb-column__overlay\"><\/div><div class=\"uagb-column__inner-wrap\">\n<p id=\"block-cfb21e59-49ec-4875-a2a8-7109f4e6b1b1\">Engineer at Intel, has more than three decades experience in parallel computing, and is an author\/co-author\/editor of ten technical books related to parallel programming. James works at Intel promoting parallel programming in a heterogeneous (XPU) world.<\/p>\n\n\n\n<p><em>Here is his article published on <a href=\"https:\/\/thenewstack.io\/heterogeneous-processing-requires-data-parallelization-tools-sycl-and-dpc-are-a-good-start\/\">The New Stack<\/a><\/em>.<\/p>\n<\/div><\/div>\n<\/div><\/section>\n\n\n\n<p>I like to say that \u201cIt\u2019s all about XPUs.\u201d<\/p>\n\n\n\n<p>We are in a wonderful time when hardware innovation is leading to an explosion in CPUs, GPUs, FPGAs, DSPs, ASICs and more\u2014which I simply abbreviate as <strong>XPUs<\/strong>. <strong>XPUs<\/strong> is a shorthand for any type of \u201cprocessing unit\u201d \u2014any hardware that can help my application compute.<\/p>\n\n\n\n<p>As developers, the onslaught of <strong>XPUs<\/strong> means that <strong>we are increasingly challenged to code for a larger collection of diverse processing units<\/strong>. We are tasked with factoring in extra time, and money, to rewrite and test code to boost application performance for new architectures.<\/p>\n\n\n\n<p>More than ever, to preserve our sanity and the maintainability of our code, it is paramount that the code we write is applicable to as many XPUs as possible. Moving to cross-architecture models for application development has shown that this can <strong>save organizations significant time and money<\/strong>, and this becomes an even more pressing concern with the rise in popularity of heterogeneous computing.<\/p>\n\n\n\n<p>Underway today is a rethinking because our world is rapidly becoming a world of <strong>XPUs<\/strong> that will eventually <strong>transform all of computing.<\/strong><\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>XPUs: Reinventing Software for Accelerated Compute<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>CUDA<\/strong>, a widely used proprietary software programming system, was designed and is effective for NVIDIA GPUs. OpenCL took an open approach and achieved a certain level of multivendor support.<\/li><li><strong>OpenCL<\/strong> had its own shortcomings\u2014most notably being C-centric and failing to address C++ needs well.<\/li><\/ul>\n\n\n\n<p><strong>CUDA and OpenCL <\/strong>have served their purposes well. Going forward developers need a truly open and multivendor approach to help deliver on the promises of XPUs.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Why SYCL and Data Parallel C++ (DPC++) Offer the Best Path Forward<\/strong><\/h2>\n\n\n\n<p>The learnings from both CUDA and OpenCL set the stage for the emergence of a truly popular and open solution for data parallelism based on C++ for heterogeneous systems.<\/p>\n\n\n\n<p>That solution is <strong>SYCL<\/strong>, which is a higher-level programming model to improve programming productivity on multiple hardware accelerators. It has quickly gained broad multivendor support, widespread interest and the support of multiple serious compiler projects.<\/p>\n\n\n\n<p><strong>SYCL<\/strong> is important because effective programming in our increasingly heterogeneous world requires that we offer performant access for all XPUs. <strong>Only a truly open approach can provide that.<\/strong><\/p>\n\n\n\n<p><strong>SYCL<\/strong> is an open standard for single-source C++ data-parallel programming of heterogeneous hardware, or XPUs. SYCL allows single-source compilation in C++ to target multiple devices on a system, rather than using C++ for the host and domain-specific kernel language(s) for the device(s).<\/p>\n\n\n\n<p><strong>SYCL<\/strong> brings to C++ both kernel-style programming and a mechanism to locate, query, and use accelerators in a system.<\/p>\n\n\n\n<p>Kernel-based programming is an important programming style for harnessing data parallelism that was also supported in OpenCL and CUDA. An ability to enumerate and access accelerators, in a standard way, was previously introduced by OpenCL.<\/p>\n\n\n\n<p><strong>Also take a look at DPC++<\/strong> (Data Parallel C++), which provides an open implementation to the LLVM community, with ambitions to upstream everything into LLVM C++ compilers. <strong>DPC++<\/strong> aims to implement SYCL with some extensions.<\/p>\n\n\n\n<p><strong>DPC++<\/strong> pioneered many features that are now in <a href=\"https:\/\/www.khronos.org\/sycl\/\">SYCL 2020<\/a>, and therefore had a head start in implementing much of SYCL 2020 even before the ink was dry on the standard.<\/p>\n\n\n\n<p>Work remains to complete alignment with the entire SYCL 2020 specification; all the work is easy to observe in the very active <a href=\"https:\/\/github.com\/intel\/llvm\">open source repository<\/a>.<\/p>\n\n\n\n<p><strong>DPC++<\/strong> is used by <a href=\"https:\/\/ritme.com\/en\/software\/intel-oneapi\/\">Intel<\/a> to target Intel\u00ae CPUs, GPUs, and FPGAs.<\/p>\n\n\n\n<p>DPC++ is also used by <a href=\"https:\/\/www.hpcwire.com\/2020\/02\/04\/codeplay-open-sources-a-version-of-computecpp-for-nvidia-gpus\/\">Codeplay<\/a> to target NVIDIA GPUs.<\/p>\n\n\n\n<p>Another SYCL compiler, <a href=\"https:\/\/github.com\/illuhad\/hipSYCL\">hipSYCL<\/a>, supports AMD CPUs and GPUs by connecting with AMD\u2019s HIP\/ROCm.<\/p>\n\n\n\n<p>Having multiple open source compilers for SYCL is <strong>fantastic for the community<\/strong>, and it demonstrates that <strong>SYCL<\/strong> has<strong> broad, diverse, and open support<\/strong>.<\/p>\n\n\n\n<p>Over the course of 2019 and 2020, I worked with a dedicated small team to create the first book about <strong>SYCL<\/strong> and <strong>DPC++<\/strong>. You can download a free copy from the <a href=\"https:\/\/www.apress.com\/us\/book\/9781484255735\">Apress<\/a> website.<\/p>\n\n\n\n<p>Shortly after its publication, the <strong>Khronos<\/strong> <strong>Group<\/strong> announced the finalized specification for <a href=\"https:\/\/www.khronos.org\/sycl\/\">SYCL 2020<\/a>.<\/p>\n\n\n\n<p>The recent ratification of the <strong>SYCL 2020 specification<\/strong> is a significant milestone. It is truly an open specification with a bright future ahead; the specification is the product of years of specification development by many dedicated individuals from around the industry. Based on C++17, <strong>SYCL 2020<\/strong> enables easier acceleration of standard C++ applications and drives a closer alignment with the ISO C++ roadmap.<\/p>\n\n\n\n<p><strong>The Khronos Group<\/strong> highlighted, in their <strong>SYCL 2020<\/strong> announcement, a number of <strong>SYCL 2020<\/strong> features including support for Unified Shared Memory (USM), built-in reductions, extensive use of CTAD and atomic operations that align with standard C++ atomics. <\/p>\n\n\n\n<h2 class=\"wp-block-heading\">XPUs Are the Future, Let\u2019s Keep It Open for the Benefits of XPU Diversity and Programming Sanity<\/h2>\n\n\n\n<p><strong>SYCL and DPC++<\/strong> will help us make effective use of XPUs. They are part of a broader push for support of XPUs that extends into libraries and all software development tools, building on the ambitions of <strong>SYCL<\/strong> and its compilers.<\/p>\n\n\n\n<p>That is the origin of the <a href=\"https:\/\/www.oneapi.io\/\">oneAPI industry initiative<\/a>, which I\u2019m really passionate about and was excited to be a part of as I rejoined Intel <\/p>\n\n\n\n<p>The support for this whole topic\u2014of easing the challenges of using all XPUs openly\u2014is driving interest in <strong>SYCL and oneAPI<\/strong>. <\/p>\n\n\n\n<p>A solid example is the use of the <strong>oneAPI Deep Neural Network Library<\/strong> (oneDNN), initially highly optimized for Intel processors, which <strong>accelerates the world\u2019s fastest computer<\/strong> (with ARM processors). <\/p>\n\n\n\n<p>As a result, <strong>oneDNN has strong ARM support now, too<\/strong>. The openness of <strong>SYCL<\/strong> and <strong>oneAPI<\/strong> libraries and tools are helping usher in a new era for openness and performance to give us useful programming access to all XPUs.<\/p>\n\n\n\n<p>Together, the software developer community has an opportunity to create standards, including <strong>SYCL<\/strong>, that serve the whole industry, and strongly support the adoption of heterogeneous programming (XPUs) and modern C++ as it embraces parallelism.<\/p>\n\n\n\n<p><strong>SYCL<\/strong> offers an open standard with broad support, lots of ability to participate, multiple open-source implementations, and seemingly infinite possibilities.<\/p>\n\n\n\n<p><strong>DPC++<\/strong> provides an open LLVM-based compiler to reduce the effort to support SYCL and encourage strong compatibility across XPUs.<\/p>\n\n\n\n<p><strong>oneAPI<\/strong> offers a forum to discuss and drive open and performant access for XPUs into all aspects of software development.<\/p>\n\n\n\n<p>I hope you\u2019ll take the opportunity to get educated about <strong>SYCL<\/strong>, <strong>DPC++ and oneAPI because XPUs are the future of compute<\/strong>.<\/p>\n\n\n\n<p>We should shape support for XPUs <strong>together, in the open<\/strong>, and enjoy the benefits of the enormous diversity in XPUs available for us to program effectively.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Underway today is a rethinking because our world is rapidly becoming a world of XPUs that will eventually transform all of computing.<\/p>\n","protected":false},"author":2,"featured_media":19403,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"inline_featured_image":false,"_uag_custom_page_level_css":"","footnotes":""},"categories":[159],"tags":[],"class_list":["post-19349","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-labs-solutions-en"],"acf":[],"yoast_head":"<!-- This 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